Methods and systems to minimize delamination of multilayer ceramic capacitors

ABSTRACT

Methods and systems to improve a multilayer ceramic capacitor using additive manufacturing are disclosed. Conductive layer ends of a multilayer ceramic capacitor may be modified to comprise a round shape, which may increase structural stability of the capacitor&#39;s layers. Other configurations may be possible, such as bulbous or wavy shaped conductive layer ends. The layers may comprise one or more pillars made from dielectric material, e.g., barium titanate, disposed through a portion of a conductive layer. The dielectric material may be the same material used in the insulator layers of the capacitor. Each pillar may comprise a plurality of spot connections surrounding its perimeter. The embedded pillars may be used to prevent delamination of the layers and to increase mechanical strength. Additionally, an algorithm of a computing device may determine an optimal shape, size, and/or configuration of the capacitor based on one or more predetermined specifications or properties.

CLAIMS OF PRIORITY

This patent application is a continuation of:

-   (1) U.S. utility patent application Ser. No. 15/406,763, titled    ‘Methods and systems to minimize delamination of multilayer ceramic    capacitors’ filed on Jan. 15, 2017.-   (2) U.S. utility patent application Ser. No. 15/212,297, titled    ‘Methods and systems for increasing surface area of multilayer    ceramic capacitors’ filed on Jul. 18, 2016, which claims benefit of    U.S. provisional patent application No. 62/194,256, titled ‘Methods    and systems for increasing capacitance of multi-layer ceramic    capacitors’, filed on Jul. 19, 2015.-   (3) U.S. utility patent application Ser. No. 15/250,993, titled    ‘Methods and systems for geometric optimization of multilayer    ceramic capacitors’ filed on Aug. 30, 2016, which claims benefit of    U.S. provisional patent application No. 62/211,792, titled ‘Methods    and systems for geometric optimization of multi-layer ceramic    capacitors’, filed Aug. 30, 2015.-   (4) U.S. utility patent application Ser. No. 15/273,703, titled    ‘Methods and systems for material cladding of multilayer ceramic    capacitors’ filed on Sep. 23, 2016, which claims benefit of U.S.    provisional patent application No. 62/232,419, titled ‘Methods and    systems for material cladding of multi-layer ceramic capacitors’,    filed Sep. 24, 2015.-   (5) U.S. utility patent application Ser. No. 15/376,729, titled    ‘Methods and systems to improve printed electrical components and    for integration in circuits’, filed Dec. 13, 2016, which claims    benefit of U.S. provisional patent application No. 62/266,618,    titled ‘Methods and systems to improve printed electrical components    and for integration in circuits’, filed Dec. 13, 2015.-   (6) U.S. provisional patent application No. 62/279,649, ‘Methods and    systems to minimize delamination of multi-layer ceramic capacitors’,    filed Jan. 15, 2016.

FIELD OF TECHNOLOGY

This disclosure relates generally to forming a novel structure ofmultilayer ceramic capacitors (MLCC) using the technique ofdrop-on-demand additive printing to deposit droplets of depositionmaterial.

BACKGROUND

Multi-layer ceramic capacitors, or MLCCs, have traditionally beenmanufactured by forming a tape from an insulating ceramic slurry,printing conductive ink layers, and then pressing the layers together toform a laminated alternation of insulator and conductor. Particularly inthe case of a physically large MLCC, there is a possibility ofdelamination under the stress of temperature or pressure. If a layerseparates, even slightly, there may be a drop in the capacitance thatcan render it out of spec, or there can be complete device failure.

This tendency is aggravated by the fact that metals do not usuallyadhere well to ceramics in general. A well-known example of this was thedifficulty the early US Space Shuttle flights had with losing ceramictiles from the Shuttle during re-entry, which requires specialprocedures to bond the tiles to the metal surface of the Shuttle. In thecase of MLCCs, it can force the use of expensive silver oxide inkinstead of ordinary copper-based ink. There is a need for a system and amethod to manufacture MLCCs comprising with high resistance todelamination and maintains the overall physical strength and electricalproperties of the MLCC.

SUMMARY

Recently, it has become possible to create passive components usingadditive manufacturing (also called 3D printing) where ink jets oraerosol jets deposit materials such as ceramic slurry and conductiveink. This is an inherently more precise and repeatable process thantraditional methods, and produces higher density components with lessmaterial waste. The key advantage for purposes of this inventiondisclosure is that more complex shapes can be printed than simple flatlayers, and this capability can be used to improve the structuralintegrity of the part.

In one aspect, the present invention discloses a system and a method toimprove a ceramic capacitor using additive manufacturing, e.g., 3DPrinting, where ink or aerosol jets deposit material such as, e.g.,ceramic slurry, conductive ink, ferrite paste, and carbon resistor pasteonto a surface. The aforementioned materials can be sintered at hightemperatures, and therefore are amenable to integrated manufacture.Compared with traditional methods, this process may be inherently moreprecise and repeatable, has much higher geometric and spatialresolutions, and produces higher density components with less materialwaste. In addition, a key advantage for purposes of this invention isthat more complex shapes that were not possible before can now beprinted, which can be used to improve specification and/or structuralintegrity of the product.

In another aspect, the present invention discloses a method and a systemto increase structural stability of MLCC layers by rounding ofconductive layer ends. The round ends may also eliminate areas ofintense electric field, e.g., hotspots. Other configurations may also bepossible, such as bulbous or wavy shapes.

In yet another aspect, the present invention discloses methods andsystems to prevent or minimize MLCC delamination. Multi-layer ceramiccapacitors, or MLCCs, have traditionally been made by forming a tapefrom an insulating ceramic slurry, printing conductive ink layers, andthen pressing the layers together to form a laminated alternation ofinsulator and conductor. Particularly in the case of a physically largeMLCC, there is possibility of delamination under the stress oftemperature and/or pressure. If a layer separates, even slightly, thereis a drop in the capacitance that can render it out of spec, or therecan be complete device failure. An object of this invention is toprovide a reinforcement of insulation material among and between layersof an MLCC, which may provide added mechanical endurance properties andrepresses or prevents delamination between the layers.

Embedded pillars of dielectric may be used to prevent delamination andincrease mechanical strength. The lamination strength may be increasedthrough a process of ‘quilting’, which is made possible with the systemsand methods of the present invention, namely the technique ofdrop-on-demand printing, as the prior art process of ‘tape casting’would not be able to accomplish this technique. Quilting may refer tothe creation of spot connections, e.g., pillars, of insulator throughthe conductive layers.

In yet another aspect, the present invention discloses a system and amethod for optimizing geometry of a multilayer ceramic capacitor byusing an algorithm of a computing device comprising a memory andprocessor to determine configurations of conductive layer ends and/orarrangements of one or more pillars based on predeterminedspecifications or properties of the capacitor. The algorithm may beinputted with one or more desired specification or property, such as,e.g., maximum capacitance, and may output the most cost effective size,shape, and/or configuration of an ideal MLCC to match the desiredspecification or property. Once a capacitor configuration is determined,an additive manufacturing printer communicatively coupled to thealgorithm may produce the desired product.

BRIEF DESCRIPTION OF THE DRAWINGS

Example embodiments are illustrated by way of example and are notlimited to the figures of the accompanying drawings, in which, likereferences indicate similar elements.

FIG. 1 is a cross-section view of an example plate capacitor.

FIG. 2 is a perspective view of an example single-capacitive layercapacitor, shown semi-transparent for clarity.

FIG. 3 shows a single capacitive layer capacitor encased in insulation,and capped with conductive electrodes, according to at least oneembodiment.

FIG. 4 is a cutaway perspective view of a conventional multilayerceramic capacitor.

FIG. 5 is a schematic representation of a front cross-section view of aconventional multilayer ceramic capacitor.

FIG. 6 is a system of a drop-on-demand type additive printer that may beused to implement one or more embodiments of the present invention.

FIG. 7 is a flow diagram of a method of an additive printing processthat may be implemented with one or more embodiments of the presentinvention.

FIG. 8A is a schematic rendition of a prior art MLCC, shown as a flatprojection. FIG. 8B shows improved capacitor conductors comprisingdecreased physical stress in insulator layers through rounding ofconductor layer end, according to at least one embodiment.

FIGS. 9A-E show various conductive layer end configurations, accordingto some embodiments.

FIG. 10A is a front view of a flat projection of an MLCC showing quiltedlayers, according to at least one embodiment.

FIG. 10B is a top view of an MLCC showing a columnar pillar arrangement,according to at least one embodiment.

FIG. 11A is a cross-section view of a quilted MLCC, showing pillararrangements through a conductive layer, according to at least oneembodiment.

FIG. 11B is a top view of a pillar showing an added strengthreinforcement structure, according to at least one embodiment.

FIG. 12 shows a top view of a quilted MLCC, comprising multiple pillars,according to at least one embodiment.

FIGS. 13A-B are top views depicting different configurations of pillararrangements, according to at least one embodiment.

FIG. 14 is a flow diagram of a method of additive manufacturing that maybe implemented in one or more embodiments of the present invention.

FIG. 15 is a flow diagram of another method of additive manufacturingthat may be implemented in one or more embodiments of the presentinvention.

FIG. 16 is a flow diagram of a method of an additive printing processthat may be implemented with one or more embodiments of the presentinvention.

FIG. 17 illustrates a computing environment, according to someembodiments.

FIG. 18 is a schematic block diagram of a sample computing environmentwith which the present invention may interact.

DETAILED DESCRIPTION

Disclosed are methods and systems to minimize delamination of multilayerceramic capacitors (MLCCs). Although the present embodiments have beendescribed with reference to specific example embodiments, it will beevident that various modifications and changes may be made to theseembodiments without departing from the broader spirit and scope of thevarious embodiments. In addition, the components shown in the figures,their connections, couples, and relationships, and their functions, aremeant to be exemplary only, and are not meant to limit the embodimentsdescribed herein.

A capacitor is an electrical device that stores energy in the electricfield between a pair of closely spaced conductors. Capacitors may beused as energy-storage devices, and may also be used to differentiatebetween high-frequency and low-frequency signals. Capacitance value maybe defined as a measure of how much charge a capacitor can store at acertain voltage.

FIG. 1 is a cross-section view of an example plate capacitor. Acapacitor may comprise two conductor 100 (electrodes) separated byinsulator 102. The plate capacitor may be manufactured from threeparallel plates. If the plates have an area, A, that is separated by adistance d as shown, then the capacitance, C, can be expressed as theformula:

$C = \frac{{\kappa\epsilon}_{0}A}{d}$

where K is the ratio of the insulator permittivity to that of a vacuum(sometimes called the dielectric constant of the material), and ∈₀ isthe permittivity of a vacuum. The formula may be inexact due to edgeeffects: at the border of the parallel plates, the electric field bulgesaway from the capacitor. If the plate size is large relative toseparation ‘d’, the edge effect is negligible.

FIG. 2 is a perspective view of an example single-capacitive layercapacitor, shown semi-transparent for clarity. The typical rectangularshape may allow for ease of close-packing on a circuit board, and theheight dimension may be small relative to the other dimensions to allowconstruction of flat or low-profile devices. A capacitor may comprisetwo conductors 200 separated by an insulator 202. Ceramic capacitors maybe created by tape casting, in which a slurry of powdered ceramic andbinder is spread over a flat surface with a knife edge to create theinsulator, and coated with conductive ink.

FIG. 3 shows a single capacitive layer capacitor encased in insulation,and capped with conductive electrodes, according to at least oneembodiment. A pair of electrodes 300 may be disposed on the left sideand right side of the capacitor instead of the top or bottom to permitsurface mounting on a circuit board. The capacitor may be encased ininsulator 302 on the top, bottom, front and back sides, e.g., thenon-electrode sides, to protect the device both structurally andelectrically. Note that this may entail shortening the internalconductive layer 304 where they would come too close to the oppositeelectrode 300, to preserve the insulative spacing to at least as greatas that between layers in the vertical direction. Insulator layer 306may be dielectric disposed between a pair of conductive layers 304.

High-permittivity ceramic materials used as insulator material, such assintered barium titanate, are structurally strong in thick layers.However, in thin layers, like many materials, it may not be ofsufficient strength. Stress can cause strain and separation, as well ascracking. External pressure can be the source of the stress, or it canbe caused by heat since thermal expansion can be uneven in the deviceand will lead to disparate thermal expansion between the metal andceramic layer. When separation occurs, it is called delamination sincethe layers no longer have the intended spacing needed to preserveelectrical properties. It is important for capacitors to be able topreserve their electrical properties over a wide temperature range, dueto both the temperature variations that may occur in their applicationin addition to the heat applied to solder the capacitor electrodes whenmanufacturing a product with the device.

While shown here is only a single capacitive layer for purposes ofillustration, a typical MLCC may comprise multiple layers. The problemmay be the same for a many-layer MLCC or worse, given the instabilitythat may arise from multiple stacks of alternating material layers. Inaddition, the shape of the MLCC may also be a factor in delamination,such as if the MLCC is not rectangular in horizontal cross section. Theapplicability of the invention described below is also not limited toany particular geometry.

A multilayer ceramic capacitor (MLCC) may be a device made of ceramicand metal that alternate to make a multilayer chip. The capacitancevalue of an MLCC may be determined by several factors, such as geometryof the part, e.g., shape and size, and total active area. The dielectricconstant, K, may be determined by the ceramic material. The total activearea may be the overlap between two opposing electrodes. A thickness ofthe dielectric ceramic material may be inversely proportional to thecapacitance value such that the thicker the dielectric, the lower thecapacitance value. This may also determine the voltage rating, with athicker dielectric layer comprising a higher voltage rating than athinner one.

FIG. 4 is a cutaway perspective view of a conventional multilayerceramic capacitor. The MLCC may comprise a laminated cube-shaped body400 having alternately stacked conductive layer 402 and ceramicdielectric layer 404, and a pair of external termination A 406 andtermination B 408 positioned at two opposite end portions of the body400. The conductive layer 402 may be made from a noble metal and/or abase metal, e.g., copper, and nickel, silver, palladium, gold, andplatinum. The dielectric layer 404 may be made from ceramic material,such as, e.g., barium titanate.

A plurality of conductive layer 402 may be alternately connected totermination A 406 and termination B 408, such that termination A 406 isconnected to every second conductive layer 402, and termination B 408 isconnected with the remaining conductive layer 402 not connected totermination A 406. Conductive layer 402 and dielectric layer 404 mayhave flat surfaces, and the thickness of conductive layer 402 may bespatially uniform, e.g., same height. When a voltage is applied totermination A 406 and termination B 408, the MLCC may produce electricfields between every two neighboring conductive layer 402 and storeelectric charges therein.

FIG. 5 is a schematic representation of a front cross-section view of aconventional multilayer ceramic capacitor. Dielectric layer 500 andconductive layer 502 may be several microns thick, and distance 504between a non-connecting conductive layer end 506 and a correspondingsurface of termination 508 that is coupled to the capacitor's body maynot be reducible to less than 500 microns due to the imprecise nature ofprior art manufacturing processes.

Multilayer ceramic capacitors have traditionally been made by forming atape from insulating ceramic slurry, printing conductive ink layers,pressing the layers together, and then sintering to form a laminatedalternation of insulator and conductor. However, particularly in thecase of a physically large MLCC, there is a possibility of delaminationunder the stress of temperature or pressure. If a layer separates, evenslightly, there is a drop in the capacitance that can render it out ofspecification, or there can be complete device failure. In addition, theprocess may be limited to simple flat layers and complex shapes may notbe possible, such as to avoid sharp corners that can cause voltagebreakdown.

In at least one embodiment, the present invention discloses a system anda method to improve a ceramic capacitor using additive manufacturing,e.g., 3D Printing, where ink or aerosol jets deposit material such as,e.g., ceramic slurry, conductive ink, ferrite paste, and carbon resistorpaste onto a surface. The aforementioned materials can be sintered athigh temperatures, and therefore are amenable to integrated manufacture.Compared with traditional methods, this process may be inherently moreprecise and repeatable, has much higher geometric and spatialresolutions, and produces higher density components with less materialwaste. In addition, a key advantage for purposes of this invention isthat more complex shapes that were not possible before can now beprinted, which can be used to improve specification and/or structuralintegrity of the product.

FIG. 6 is a system of a drop-on-demand type additive printer that may beused to implement one or more embodiments of the present invention. Aslurry jet 600 may be dispensed from a nozzle 604 having an orificecomprising an opening, and may be raster or vector scanned on track 606by a carriage 608 driven by drive unit 610 over a surface 612 or on topof an already formed powder bed to define a new layer. Pressure may beused to force the slurry out of the nozzle and into a continuous streamof slurry jet 600 and/or as droplet 602, which may be defined as abreakup of the flow. A layer surface height measurement unit, such as,e.g., a laser rangefinder may be used to receive an input signal tocontrol the height of the surface that is formed by varying the deliveryof slurry.

A typical implementation of an additive manufacturing process beginswith defining a three-dimensional geometry of the product usingcomputer-aided design (CAD) software. This CAD data is then processedwith software that slices the model into a plurality of thin layers. Aphysical part is then created by the successive printing of these layersto recreate the desired geometry. This process is repeated until all thelayers have been printed. Typically, the resulting part is a “green”part, which may be an unfinished product that can undergo furtherprocessing, e.g., sintering. The green part may be dense andsubstantially non-porous.

FIG. 7 is a flow diagram of a method of an additive printing processthat may be implemented with one or more embodiments of the presentinvention. Operation 710 defines a final product's three-dimensionalgeometry using CAD software. In operation 720 deposits layers of slurrycomprising powder material and binder onto a surface or on top of apowder bed, which then slip-casts to make a new layer. As the slurrydeposits in each two dimensional layer, the printer may select insulatoror conductor as the material type, in separate passes or as a combinedpass. The slurry may be deposited in any suitable manner, includingdepositing in separate, distinct lines, e.g., by raster or vectorscanning, by a plurality of simultaneous jets that coalesce before theliquid slip-casts into the bed, or by individual drops. The deposit ofslurry drops may be individually controlled, thereby generating aregular surface for each layer. Operation 730 dries any liquid from thepowder bed, e.g., infrared flash-dry, after deposition of each layer.Operation 740 repeats operations 720 and 730 until a green part isformed. Operation 750 sinters the green part to form a final product.Sintering is a solid-state diffusion process that may be enhanced byincreasing the surface area to volume ratio of the powder in any greenpart that is subsequently sintered.

In at least one embodiment, the present invention discloses a method anda system to increase structural stability of MLCC layers by rounding ofconductive layer ends. The round ends may also eliminate areas ofintense electric field, e.g., hotspots. Other configurations may also bepossible, such as bulbous or wavy shapes.

FIG. 8A is a schematic rendition of a prior art MLCC, shown as a flatprojection. The sharp corners of conductive layer end 800 may presentstress singularities that are structurally unstable in response tostress, in addition to hotspots, e.g., areas of intense electric fieldthat can lower maximum voltage. FIG. 8B shows improved capacitorconductors comprising decreased physical stress in insulator layersthrough rounding of conductor layer end 802, according to at least oneembodiment. The rounding of the corners may be uniform in the depthdirection, such that it comprises a cylindrical shape. Conductor layerend 802 may be described as comprising a half-circle cross-section or adome-shape. The modification shown here also has the effect of removingan electrostatic singularity that occurs in the sharp endpoints of theconductor, which increases the maximum voltage the capacitor can beraised to without causing dielectric breakdown. The voltage may or maynot be the limiting factor in a particular MLCC application; a separateinvention disclosure focuses on increased energy density using the morecomplex geometries possible with 3D printing.

FIGS. 9A-E show various conductive layer end configurations, accordingto some embodiments. In FIG. 9A, a standard conductive layer end of anMLCC that's geometry is limited by its production process of tapecasting. Conductive layer 900 may comprise sharp corner 902 present inthe standard end, which may produce structural instability and unwanted‘hot spots’ that can lower maximum operating voltage. Pressure may notbe evenly distributed at the edge of conductive layer 900. FIG. 9Bintroduces a novel round end 902 of a conductive layer end 906 inaccordance with an embodiment of the present invention. Round end 902may comprise a convex dome shape with a wide-angle, e.g., greater than180-degrees. Pressure may be evenly distributed at the edge ofconductive layer end 906. This round shape is enabled by the precisionof the method of drop-on-demand printing discussed above. The roundshape eliminates sharp corners, therefore allows for maximum capacitanceefficiency.

In FIG. 9C, a conductive layer end comprises a bulb shape. Bulbous end904 may be thicker than the conductive layer and may comprise awider-angle, e.g., greater than 90-degrees, sharp corner 906, whencompared with the right-angle, e.g., 90-degrees, sharp corner 900 ofFIG. 9A, thus improves voltage efficiency over the prior art. In FIG.9D, sharp corner 906 of bulbous end 910 of FIG. 9C is further modifiedto comprise smooth angle 908 that may structurally resemble the letter“S”, which eliminates unwanted sharp corners from the bulbconfiguration. Bulbous end 910 may resemble a mushroom shape. In FIG.9E, the conductive layer end is modified into wavy end 912, which alsoeliminated sharp corners. Wavy end 912 may differ from round end 902 ofFIG. 9B due to comprising two or more crests and one or more trough, andcomprising at least one angle that is 90-degrees or less. Wavy end 912may also be absent of any sharp corners.

Other shapes and configurations of electrode endpoints may be within thescope of the present invention. For example, conductor endpoints maycomprise a wavy shape, or any other shape that eliminates or minimizesthe aforementioned physical instability and hot spot.

For any geometry, a computer program is used to determine the fieldlines and equipotential lines. The optimum capacitance is when thedensity of field lines is as nearly uniform as possible, and the threeideas provide the parameters that are then adjusted until that optimumis achieved. This further exploits the precision possible with 3DPrinting.

In at least one embodiment, the present invention discloses methods andsystems to prevent or minimize MLCC delamination. Multi-layer ceramiccapacitors, or MLCCs, have traditionally been made by forming a tapefrom an insulating ceramic slurry, printing conductive ink layers, andthen pressing the layers together to form a laminated alternation ofinsulator and conductor. Particularly in the case of a physically largeMLCC, there is possibility of delamination under the stress oftemperature and/or pressure. If a layer separates, even slightly, thereis a drop in the capacitance that can render it out of spec, or therecan be complete device failure. An object of this invention is toprovide a reinforcement of insulation material among and between layersof an MLCC, which may provide added mechanical endurance properties andrepresses or prevents delamination between the layers.

Embedded pillars of dielectric may be used to prevent delamination andincrease mechanical strength. The lamination strength may be increasedthrough a process of ‘quilting’, which is made possible with the systemsand methods of the present invention, namely the technique ofdrop-on-demand printing, as the prior art process of ‘tape casting’would not be able to accomplish this technique. Quilting may refer tothe creation of spot connections, e.g., pillars, of insulator throughthe conductive layers.

FIG. 10A is a front view of a flat projection of an MLCC showing quiltedlayers, according to at least one embodiment. One or more pillar 1000may comprise insulator material, such as, e.g., barium titanate. Theadded insulator material may create a strong structure throughconductive layer 1004 and may restrict the ability of the layers toseparate. While a plurality of pillar 1000 among a plurality ofconductive layers 1004 need not be vertically aligned into a column,strength is highest if they are so aligned. It is also possible to useother cross-sectional shapes for the pillar, other than circular, suchas that of an I-beam, elliptical-shaped beam, and/or triangle-shapedbeam. The tradeoff may be that a more complex cross-sectional shape forthe pillar connections may create regions of high electrostaticintensity that may limit the voltage to which the device can be charged,although maximum strength and resistance to delamination may beincreased. Therefore, the choice of shape depends on whether thecapacitor performance is limited by maximum voltage or maximum strength.

The total volume of pillar 1000 should be the minimum amount needed toprevent structural failure, since the additional insulator materialdisplaces conductive layer 1004's surface area and thus reducescapacitance. For example, pillar 1000's volume should not exceed apredetermined ratio to conductor layer 1004's volume, such as, e.g.,1/3. The exact design will be a function of the product requirementsdetermined by marketing, so a highly delamination-resistant MLCC mayhave more quilting for high-temperature or high-pressure environments,for instance.

Conductive layer end 1006 may comprise a round or concave shape, such asa half-circle cross-section or a dome-shape. The rounded configurationmay give the benefits of increasing maximum voltage through thereduction of areas of intense electric field, and may increasestructural strength through the removal of stress singularities. Inaddition, pillar edge 1008 may comprise a round or convex shape, alsofor removal of stress singularities and reduction of intense electricfield; however, the invention may not be so limited and pillar edge 1008may comprise the standard end with sharp corners, if such resultingspecification is desired.

FIG. 10B is a top view of an MLCC showing a columnar pillar arrangement,according to at least one embodiment. One or more pillar 1010 maycomprise may be arranged vertically in such a manner that a top pillar1010 of a conductive layer 1014 super-imposes upon any and all pillarsof layers above or below it. Different configurations may be employed,such as, e.g., the pillars may be placed juxtaposed to each other in thehorizontal direction, or they may be irregularity spaced.

FIG. 11A is a cross-section view of a quilted MLCC, showing pillararrangements through a conductive layer, according to at least oneembodiment. One or more pillar 1100 may be disposed in anyconfiguration, such as, e.g., evenly spaced or irregularly spaced. Aplurality of pillar 1000 may be of an equal size or varying sizes,depending on the application.

As shown, two insulator layers 1102 and a middle conductive layer 1104may be quilted together a plurality of pillar 1100. Pillar 1100 may bemade from the same dielectric material as insulator layer 1102, or itmay be of a different dielectric material. Using the same dielectricmaterial may provide stronger bonding strength, and using a differentdielectric material may affect capacitance. A predetermined thickness ordiameter of pillar 1100 may depend on the material and thickness of theinsulator layers 1102 and/or conductive layer 1104.

Additionally, individual pillar 1100 can be of any shape, such as, e.g.,elliptical, circular, square, or triangular. The shape may depend on apredetermined bonding characteristic of the layers.

FIG. 11B is a top view of a pillar showing an added strengthreinforcement structure, according to at least one embodiment. Pillar1106 may comprise nook 1108, which may be an area of recess on theperimeter of pillar 1106 used for added bond strength of pillar 1106 tothe layers by its sharp inward protrusion, and increase of surface area.However, the sharp tip may present a stress singularities and/or hotspot (previously discussed), and therefore its occurrence may beminimized, such as, e.g., one or two per pillar, and its size may alsobe minimized, such as, e.g., less than 2 microns in length. FIG. 11Billustrates nook 1106 comprising a sharp angle tip, but otherconfigurations may be used, such as, e.g., a nook that comprises arounded tip, which may provide the desired strength without any sharpcorner which may compromise capacitor efficiency.

Pillar 1106 may comprise a circular-shape cross-section, but otherconfigurations are within the scope of the present invention. Forexample, pillar 1106's cross-section may be of a square-shape,elliptical-shape, or a triangle-shape, depending on the desiredcharacteristic of the application.

FIG. 12 shows a top view of a quilted MLCC, comprising multiple pillars,according to at least one embodiment. Pillar 1200 may be configured in atriangle-shaped tessellation 1202, but may also be positioned accordingto any other configuration. The one shown here has the advantage ofuniform resistance to delamination and mechanical strength. However, anirregular grid tessellation may have the advantage of lacking cleavageplanes, using the well-known principle that amorphous structures aremore resistant to planar cracking than regular structures. Either couldbe used, depending on the situation.

FIGS. 13A-B are top views depicting different configurations of pillararrangements, according to at least one embodiment. FIG. 13A is amultiple-pillar arrangement configured in a square tessellation. Theremay be any number of rows and columns of pillars in the configuration.The pillars may have a single spot connection pattern surrounding itsperimeter, or if required, there may two or more spot connections foradded reinforcement.

FIG. 13B is a multiple-pillar arrangement configured in a polygonaltessellation. In general, the tessellation may be in any N-sided polygonconfiguration, for example, triangle, square, pentagon, hexagon,heptagon, octagon, nonagon, decagon, hendecagon, or dodecagon for N=3,4, 5, 6, 7, 8, 9, 10, 11 or 12, respectively. The arrangement may alsobe a mixture of different configurations of planar tessellations, suchas, e.g., comprising a combination of triangle, square, and polygontessellations. The choice of pattern may depend on a predeterminedmechanical strength value of the quilting and/or the maximum voltagerating of the MLCC. However, the total volume of the pillars may notexceed a predetermined ratio to the conductor layer on which it ispresent to prevent device failure, such as, e.g., 1/3 or 2/3 ratios.

FIG. 14 is a flow diagram of a method of additive manufacturing that maybe implemented in one or more embodiments of the present invention.Operation 1410 provides a support over a selected area. Operation 1420deposits liquid slurry to form a first layer comprising conductivemetal, such as, e.g., copper, nickel, silver, palladium, gold, and/orplatinum. The slurry may be deposited as continuous parallel streams, oras individually controlled droplets, thereby generating a regularsurface for each layer. Operation 1430 deposits liquid slurry to form asecond layer comprising dielectric or ceramic material comprising bariumtitanate. Operation 1440 deposits liquid slurry to form a third layer.The third layer may comprise the same material as the first layer. Thefirst and the third layers of the capacitor may comprise a convex roundand/or bulbous and/or wavy configuration disposed at a conductive layerend and/or at a pillar edge. A pillar may comprise dielectric materialdisposed through a portion of a conductive layer. The pillar may alsocomprise one or more spot connections at its perimeter. A plurality ofpillars may be configured in a planar tessellation. In some embodiments,operation 1420 and operation 1430 sequentially repeat until apredetermined amount of alternating layers of conductor and dielectricmaterial is achieved. Operation 1450 dries the powder bed by flashdrying, e.g., infrared heating. Operation 1460 sinters the layers toform a final product.

FIG. 15 is a flow diagram of another method of additive manufacturingthat may be implemented in one or more embodiments of the presentinvention. Operation 1510 deposits a first conductive layer onto asurface. Operation 1520 deposits a dielectric layer on a top surface ofthe first conductive layer. Operation 1530 deposits a second conductivelayer onto a top surface of the dielectric layer. Optionally, operation1540 repeats operation 1520 and operation 1530 successively andsequentially such that the conductive layers and the dielectric layersalternate, and the conductive layers are disposed at both the bottomlayer and the top layer, although in practice, the MLCCs may bemanufactured with dielectric layers disposed at both the bottom layerand the top layer.

The aforementioned steps may produce a ceramic capacitor comprising afirst conductive layer formed on a surface of a dielectric layer, and asecond conductive layer formed on the opposing surface of the dielectriclayer. The first and the second conductive layers of the capacitor maycomprise a convex round and/or bulbous and/or wavy configurationdisposed at the conductive layer end and/or at a pillar edge. Thedielectric layer may comprise a concave round and/or bulbous and/or wavyconfiguration disposed at the dielectric layer edge. A pillar maycomprise dielectric material disposed through a portion of a conductivelayer. The pillar may also comprise one or more spot connections at itsperimeter. A plurality of pillars may be configured in a planartessellation.

In at least one embodiment, the present invention discloses a system anda method for optimizing geometry of a multilayer ceramic capacitor byusing an algorithm of a computing device comprising a memory andprocessor to determine configurations of conductive layer ends and/orarrangements of one or more pillars based on predeterminedspecifications or properties of the capacitor. The algorithm may beinputted with one or more desired specification or property, such as,e.g., maximum capacitance, and may output the most cost effective size,shape, and/or configuration of an ideal MLCC to match the desiredspecification or property. Once a capacitor configuration is determined,an additive manufacturing printer communicatively coupled to thealgorithm may produce the desired product.

FIG. 16 is a flow diagram of a method of an additive printing processthat may be implemented with one or more embodiments of the presentinvention. Operation 1610 optimizes a final product's three-dimensionalgeometry using CAD software. An algorithm of a computing device may beused to maximize uniformity of electric field lines and equipotentiallines to maximize capacitance of an MLCC. In operation 1620 depositslayers of slurry comprising powder material and binder onto a surface oron top of a powder bed, which then slip-casts to make a new layer. Asthe slurry deposits in each two dimensional layer, the printer mayselect insulator or conductor as the material type, in separate passesor as a combined pass. The slurry may be deposited in any suitablemanner, including depositing in separate, distinct lines, e.g., byraster or vector scanning, by a plurality of simultaneous jets thatcoalesce before the liquid slip-casts into the bed, or by individualdrops. The deposit of slurry drops may be individually controlled,thereby generating a regular surface for each layer. Operation 1630dries any liquid from the powder bed, e.g., infrared flash-dry, afterdeposition of each layer. Operation 1640 repeats operations 1620 and1630 until a green part is formed. Operation 1650 sinters the green partto form a final product. Sintering is a solid-state diffusion processthat may be enhanced by increasing the surface area to volume ratio ofthe powder in any green part that is subsequently sintered.

FIG. 17 illustrates a computing environment, according to someembodiments. An exemplary environment 1700 for implementing variousaspects of the invention includes a computer 1701, comprising aprocessing unit 1731, a system memory 1732, and a system bus 1730. Theprocessing unit 1731 may be any of various available processors, such assingle microprocessor, dual microprocessors or other multiprocessorarchitectures. The system bus 1730 may be any type of bus structures orarchitectures, such as 12-bit bus, Industrial Standard Architecture(ISA), Micro-Channel Architecture (MSA), Extended ISA (EISA),Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), PeripheralComponent Interconnect (PCI), Universal Serial Bus (USB), AdvancedGraphics Port (AGP), Personal Computer Memory Card InternationalAssociation bus (PCMCIA), or Small Computer Systems Interface (SCST).

The system memory 1732 may include volatile memory 1733 and nonvolatilememory 1734. Nonvolatile memory 1734 may include read only memory (ROM),programmable ROM (PROM), electrically programmable ROM (EPROM),electrically erasable ROM (EEPROM), or flash memory. Volatile memory1733, may include random access memory (RAM), synchronous RAM (SRAM),dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM(DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), or directRambus RAM (DRRAM).

Computer 1701 also includes storage media 1736, such asremovable/nonremovable, volatile/nonvolatile disk storage, magnetic diskdrive, floppy disk drive, tape drive, Jaz drive, Zip drive, LS-100drive, flash memory card, memory stick, optical disk drive such as acompact disk ROM device (CD-ROM), CD recordable drive (CD-R Drive), CDrewritable drive (CD-RW Drive) or a digital versatile disk ROM drive(DVD-ROM). A removable or non-removable interface 1735 may be used tofacilitate connection.

The computer system 1701 further may include software to operate inenvironment 1700, such as an operating system 1711, system applications1712, program modules 1713 and program data 1714, which are storedeither in system memory 1732 or on disk storage 1736. Various operatingsystems or combinations of operating systems may be used.

Input devices 1722 may be used to enter commands or data, and mayinclude a pointing device such as a mouse, trackball, stylus, touch pad,keyboard, microphone, joystick, game pad, satellite dish, scanner, TVtuner card, sound card, digital camera, digital video camera, webcamera, and the like, connected through interface ports 1738. Interfaceports 1738 may include a serial port, a parallel port, a game port, auniversal serial bus (USB), and a 1394 bus. The interface ports 1738 mayalso accommodate output devices 1721. For example, a USB port may beused to provide input to computer 1701 and to output information fromcomputer 1701 to an output device 1721. Output adapter 1739, such asvideo or sound cards, is provided to connect to some output devices suchas monitors, speakers, and printers.

Computer 1701 may operate in a networked environment with remotecomputers. The remote computers may comprise a memory storage device,and may be a personal computer, a server, a router, a network PC, aworkstation, a microprocessor based appliance, a peer device or othercommon network node and the like, and typically includes many or all ofthe elements described relative to computer 1701. Remote computers maybe connected to computer 1701 through a network interface andcommunication connection 1737, with wire or wireless connections. Anetwork interface may be communication networks such as local-areanetworks (LAN), wide area networks (WAN) or wireless connectionnetworks. LAN technologies include Fiber Distributed Data Interface(FDDI), Copper Distributed Data Interface (CDDI), Ethernet/IEEE 1202.3,Token Ring/IEEE 1202.5 and the like. WAN technologies include, but arenot limited to, point-to-point links, circuit switching networks likeIntegrated Services Digital Networks (ISDN) and variations thereon,packet switching networks, and Digital Subscriber Lines (DSL).

FIG. 18 is a schematic block diagram of a sample computing environment1800 with which the present invention may interact. The system 1840includes a plurality of client systems 1841. The system also includes aplurality of servers 1843. The servers 1843 may be used to employ thepresent invention. The system includes a communication network 1845 tofacilitate communications between the clients 1841 and the servers 1843.Client data storage 1842, connected to client system 1841, may storeinformation locally. Similarly, the server 1843 may include server datastorages 1844.

A number of embodiments have been described. Nevertheless, it will beunderstood that various modifications may be made without departing fromthe spirit and scope of the claimed invention. In addition, the logicflows depicted in the figures do not require the particular order shown,or sequential order, to achieve desirable results. In addition, othersteps may be provided, or steps may be eliminated, from the describedflows, and other components may be added to, or removed from, thedescribed systems. Accordingly, other embodiments are within the scopeof the following claims.

It may be appreciated that the various systems, methods, and apparatusdisclosed herein may be embodied in a machine-readable medium and/or amachine accessible medium, and/or may be performed in any order. Thestructures and modules in the figures may be shown as distinct andcommunicating with only a few specific structures and not others. Thestructures may be merged with each other, may perform overlappingfunctions, and may communicate with other structures not shown to beconnected in the figures. Accordingly, the specification and/or drawingsmay be regarded in an illustrative rather than a restrictive sense.

What is claimed is:
 1. A multilayer ceramic capacitor, comprising: aceramic body; one or more dielectric layers alternately stacked with twoor more conductive layers; one or more pillars disposed through the twoor more conductive layers for preventing delamination of the one or moredielectric layers and the two or more conductive layers, a pair ofexternal terminations disposed at opposite end portions of the body, andwherein the two or more conductive layers are alternately coupled to anexternal termination of the pair of external termination.
 2. Themultilayer ceramic capacitor of claim 1, further comprising: wherein thepillars are aligned in a column when there are two or more pillarsdisposed in two or more conductive layers.
 3. The multilayer ceramiccapacitor of claim 1, further comprising: wherein a pillar is juxtaposedto another pillar in the horizontal direction when there are two or morepillars disposed in two or more conductive layers.
 4. The multilayerceramic capacitor of claim 1, further comprising: wherein across-section of the one or more pillars is circular.
 5. The multilayerceramic capacitor of claim 1, further comprising: wherein across-section of the one or more pillars is an I-beam shape or anelliptical shape.
 6. The multilayer ceramic capacitor of claim 1,further comprising: wherein a plurality of pillars are arranged in anequilateral triangle tessellation.
 7. The multilayer ceramic capacitorof claim 1, further comprising: wherein a plurality of pillars arearranged in a polygonal tessellation.
 8. The multilayer ceramiccapacitor of claim 1, further comprising: wherein the one or morepillars comprise a same dielectric material as the one or moredielectric layers.
 9. The multilayer ceramic capacitor of claim 1,further comprising: wherein the one or more pillars comprise a differentdielectric material as the one or more dielectric layers.
 10. Amultilayer ceramic capacitor, comprising: a ceramic body; a conductivelayer comprising at least one of a base metal and a noble metal; adielectric layer comprising barium titanate; a pillar comprisingdielectric material, wherein one or more dielectric layers arealternately stacked with two or more conductive layers, wherein the twoor more conductive layers are alternately coupled to an externaltermination of the pair of external terminations, and wherein anelectric field is generated between two juxtapose conductive layers whenvoltage is applied to the pair of external terminations.
 11. Themultilayer ceramic capacitor of claim 10, further comprising: wherein apillar super-imposes upon another pillar when the two or more pillarsare disposed in two or more conductive layers.
 12. The multilayerceramic capacity of claim 10, further comprising: wherein a plurality ofpillars are arranged in a regular shape.
 13. The multilayer ceramiccapacitor of claim 10, further comprising: wherein a plurality ofpillars are arranged in an irregular shape.
 14. The multilayer ceramiccapacitor of claim 10, further comprising: wherein the pillar comprisesa nook for increased structural stability.
 15. The multilayer ceramiccapacitor of claim 14, further comprising: wherein the nook comprises arounded tip.
 16. The multilayer ceramic capacitor of claim 14, furthercomprising: wherein the nook is less than 2 microns in length.
 17. Amultilayer ceramic capacitor, comprising: a ceramic body; one or moredielectric layers alternately stacked with two or more conductivelayers; one or more pillars disposed through the two or more conductivelayers for preventing delamination of the one or more dielectric layersand the two or more conductive layers, wherein at least one conductivelayer comprises a conductive layer end comprising a round shape forincreasing structural stability of the capacitor; a pair of externalterminations disposed at opposite end portions of the body, and whereinthe two or more conductive layers are alternately coupled to an externaltermination of the pair of external termination.
 18. The multilayerceramic capacitor of claim 17, further comprising: wherein a ratio ofvolume of the one or more pillars to the conductive layer through whichit is disposed does not exceed a predetermined value.
 19. The multilayerceramic capacitor of claim 17, further comprising: wherein the one ormore pillars comprise a round shape.
 20. The multilayer ceramiccapacitor of claim 17, further comprising: wherein a cross-section ofthe one or more pillars is a triangle shape.